A fundamental problem in semiconductor technology is that during the operation of integrated functional elements (device) such as transistors, semiconductor lasers or diodes, a not insignificant degree of thermal energy (also known as component heat) is generated. If the level of generated heat in the around the device exceeds a certain threshold value, this can lead to the general or abrupt degradation or destruction of the integrated device or even the entire circuit. With the growing need for greater output power, an ongoing trend towards miniaturising devices and increasing packing densities, the problem of unwanted heat development is growing in importance.
Several different approaches are known from the prior art which tackle the task, using different types of superstructures or layer sequences and layer structuring between semiconductor device layer structures, of transmitting the heat away from the integrated devices. Frequently, so-called heat distributors or, as an alternative or supplement, so-called heat sinks are used into which the discharge heat from the devices or more sensitive parts of the integrated circuit is transmitted.
Thus for example, an integrated circuit is known from U.S. Patent Publication No. 2007/0035011 A1 which comprises a plurality of electrical and thermal conducting “vias” (vertical interconnect accesses), to which an electrically insulating thermal conducting layer is “bonded” which enables heat removal without connecting the individual vias to each other. Here, the thermal conducting layer can for example be metallised or consist of a diamond layer.
A substrate for a circuit consisting of several layers is known from JP 2689986 B2, with which the thermal resistance of the substrate of a circuit is reduced, while at the same time, its capacity for transmitting heat can be increased. The substrate of the circuit which consists of several layers comprises an initial substrate which is based on a diamond layer, several contacting layers and diamond-based intermediate layers for electrical insulation.
A heat removal structure for a micro-electronic circuit is known from U.S. Pat. No. 7,286,359 B2, which comprises circuit elements which are arranged on an initial substrate, which comprise the areas which produce local heat which are thermally connected to a heat removal structure via feedthroughs which are fed through a thermally insulating layer.
Furthermore, a production method is known from U.S. Patent Publication No. 2006/0205161 A1 for a semiconductor device and semiconductor devices which comprise a plurality of source-gate-drain combinations which are designed for operation at high frequencies at a high output level, and in which measures or means for heat removal are provided.
DE 10 2008 063 416 A1 discloses a semiconductor device with a substrate, wherein a semiconductor layer is formed over the substrate which represents any suitable semiconductor material in order to produce circuit elements inside and above it which are arranged on a component level. Within the semiconductor device lies a buried insulating layer which separates the component level from the substrate. For the purpose of heat removal in the areas of the semiconductor device where temperature is a critical factor, in DE 10 2008 063 416 A1, openings or pits are etched over the entire height of the semiconductor device, which are filled with a filling material. The filling material then forms a heat removal element for each opening. Furthermore, a material plug can be arranged at the lower end of each opening in order to encase the filling material.